Field of the Invention
The present invention relates to a gate drive integrated circuit (IC) and a display device including the same.
Discussion of the Related Art
With the advancement of an information-oriented society, various requirements for display devices are increasing. Therefore, various display devices, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, or organic light emitting display devices, etc., are increasingly important.
A display device includes a display panel and a gate driver. The display panel includes a display area and a non-display area. The display area includes a plurality of data lines, a plurality of gate lines, and a plurality of pixels respectively provided in intersection portions of the data lines and the gate lines. The pixels are supplied with data voltages through the data lines when gate signals are supplied to the gate lines. The pixels emit lights having a certain brightness according to the data voltages. The non-display area is provided near the display area.
The gate driver may include a plurality of gate drive ICs, and the gate drive ICs may be mounted on gate flexible films. Each of the gate flexible films may be a chip-on-film type. The gate flexible films may be attached on the non-display area of the display panel using an anisotropic conductive film. Thus, the gate drive ICs may be connected to the non-display area.
A first gate drive IC receives a gate start pulse (GSP) from a timing controller and sequentially outputs p (where p is a positive integer) gate signals (G1 to Gp). A second gate drive IC receives the gate signal (Gp), which is last output from the first gate drive IC, as the gate start pulse and sequentially outputs p gate signals (Gp+1 to G2p). In this way, an N+1st (where N is a positive integer) gate drive IC receives a gate signal, which is last output from an Nth gate drive IC, as the gate start pulse.
The Nth gate drive IC is connected to the N+1st gate drive IC using a line-on glass (LOG) structure. Due to parasitic resistance and parasitic capacitor components that occur in the display panel and lines, the N+1st gate drive IC receives a gate signal, which is obtained through the delay of the gate signal that is last output from the Nth gate drive IC, as the gate start pulse.
Therefore, a time difference occurs between the gate signal last output from the Nth gate drive IC and a first gate signal output from the N+1st gate drive IC, and a dimming defect where a horizontal line parallel to a gate line is seen by a user occurring between the Nth gate drive IC and the N+1st gate drive IC.